Testbenches in Verilog II

Loading...
강의 계획서 보기

배우게 될 기술

Writing Code in Verilog, Simulating FPGA Designs, Designing FPGA Logic, Designing Test Benches, Writing code in VHDL

검토

4.2(109개의 평가)
  • 5 stars
    45%
  • 4 stars
    39%
  • 3 stars
    9%
  • 2 stars
    3%
  • 1 star
    4%
R

Apr 18, 2020

The course is best for beginners and very useful to practice the basics.

WA

Mar 22, 2020

This course really great and have a lot of fun to learn FPGA Designs.

수업에서
Verilog and System Verilog Design Techniques

강사:

  • Timothy Scherr

    Timothy Scherr

    Senior Instructor and Professor of Engineering Practice
  • Benjamin Spriggs

    Benjamin Spriggs

    Lecturer and Scholar of Engineering Practice

Coursera 카탈로그 살펴보기

무료로 참여해 맞춤화된 추천, 업데이트 및 제안을 받아보세요.